1. Field of the Invention
The present invention relates to a differential sense amplifier, and particularly to a differential sense amplifier that detects a difference of a complementary bit line pair.
2. Description of Related Art
There is a semiconductor memory of a system in which complementary cells with complementary signals written therein are read by a differential sense amplifier in order to read data stored in a memory at high speed and stably (e.g., Japanese Patent Application No. 1-263997). A semiconductor memory shown in FIG. 11 includes a differential sense amplifier 10, a memory cell 11, and a decoder 12. Two pairs of complementary cells (a Bar cell M1B and a True cell M1T, a Bar cell M2B and a True cell M2T) are connected to one pair of complementary bit lines (a Bar bit line BLB, a True bit line BLT).
Upon receiving an address, the decoder 12 selects an arbitrary word line (WL1, WL2). The Bar bit line BLB and the True bit line BLT are connected to the differential sense amplifier 10. The differential sense amplifier 10 amplifies a potential difference of the complementary bit line pair made up of, for example, the Bar bit line BLB and the True bit line BLT.
Now, reading operation of the semiconductor memory shown in FIG. 11 is described. For example, assume that the M1B and the M2T are written cells (cells in an OFF state when selected), and the M1T and the M2B are unwritten cells (cells in an ON state when selected).
When the word line WL1 is selected, the Bar cell M1B enters an OFF state, resulting in a current IBLB flowing in the Bar bit line BLB=0. Moreover, the True cell M1T enters an ON state, resulting in a current IBLT flowing in the True bit line BLT=an ON current of the cell. In this case, the differential sense amplifier 10 detects a difference between the ON and OFF states of the cells, and outputs High from output (OUT).
On the other hand, when the word line WL2 is selected, the Bar cell M2B enters an ON state, and the True cell M2T enters an OFF state. In this case, the differential sense amplifier 10 detects a difference between the ON and OFF states of the cells, and outputs LOW from the output (OUT). In this manner, the complementary signals written in the cells are read differentially to thereby execute the reading operation at high speed and stably.
In the semiconductor memory of the reading system by the differential sense amplifier, data may be written after shipment. In this case, it is necessary to conduct blank check for confirming that data is not written in either of the True and Bar cells (in an erased state) before shipment.